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Introduction

RP016​

RP016 is a project aiming to extend OpenSBI with features to support running typical TEE stacks. This project is being implemented by RISCstar.

OpenSBI is an implementation of the RISC-V Supervisor Binary Interface specification that is key to some of the OP-TEE feature enablement RISCstar will do. RISCstar will implement the needed OpenSBI feature enhancements required to provide the core infrastructure to support the execution at S-Mode of a trusted execution environment (TEE) such as the open source TEE, OP-TEE.

RISCstar is working collaboratively with RISE to develop the required features in OpenSBI. Our plans are targeted to meet the goal of enabling RISE member engineers to quickly try our code and provide feedback. We emphasize quick execution, integration and delivery, with upstreaming as a parallel background effort.

The project is split into multiple milestones:

  • Milestone 1: Baseline Setup - completed December 16, 2025
  • Milestone 2: Support for External Interrupts using the APLIC - started December 16, 2025
  • Milestone 3: Interrupt driven OpenSBI Domain Context Switching
  • Milestone 4: Generic support for platform specific system level HW isolation features
  • Milestone 5: Support for WorldGuard based system level HW isolation
  • Milestone 6: Floating Point and Vector Context management

For each milestone, RISCstar will follow open source development best practices, and maintain feature branches for our changes, develop test plans for the features implemented and any other documentation needed. We will ensure the code upstreamed is of the highest quality and follows the requirements needed to upstream it to the relevant open source project.